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| July 1996 NDS331N N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. Features 1.3 A, 20 V. RDS(ON) = 0.21 @ VGS= 2.7 V RDS(ON) = 0.16 @ VGS= 4.5 V. Industry standard outline SOT-23 surface mount package using poprietary SuperSOTTM-3 design for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. _______________________________________________________________________________ D G S Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ,TSTG Parameter Drain-Source Voltage T A = 25C unless otherwise noted NDS331N 20 8 (Note 1a) Units V V A W Gate-Source Voltage - Continuous Maximum Drain Current - Continuous - Pulsed Maximum Power Dissipation (Note 1a) (Note 1b) 1.3 10 0.5 0.46 -55 to 150 Operating and Storage Temperature Range C THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient (Note 1a) 250 (Note 1) C/W C/W Thermal Resistance, Junction-to-Case 75 (c) 1997 Fairchild Semiconductor Corporation NDS331N Rev.E ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = 250 A VDS = 16 V, VGS= 0 V TJ =125C Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 8 V, VDS = 0 V VGS = -8 V, VDS = 0 V VDS = VGS, ID = 250 A TJ =125C Static Drain-Source On-Resistance VGS = 2.7 V, ID = 1.3 A TJ =125C VGS = 4.5 V, ID = 1.5 A ID(ON) gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd On-State Drain Current VGS = 2.7 V, VDS = 5 V VGS = 4.5 V, VDS = 5 V Forward Transconductance VDS = 5 V, ID = 1.3 A, VDS = 10 V, VGS = 0 V, f = 1.0 MHz DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 162 85 28 pF pF pF 3 4 3.5 S 0.5 0.3 0.7 0.53 0.15 0.24 0.11 20 1 10 100 -100 V A A nA nA ON CHARACTERISTICS (Note 2) Gate Threshold Voltage 1 0.8 0.21 0.4 0.16 A V SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 5 V, ID = 1.3 A, VGS = 4.5 V VDD = 5 V, ID = 1 A, VGS = 5 V, RGen = 6 5 25 10 5 3.5 0.3 1 20 40 20 20 5 ns ns ns ns nC nC nC NDS331N Rev.E Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS ISM VSD Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.42 A (Note 2) 0.8 0.42 10 1.2 A A V PD(t) = R J A (t) T J-TA = R J C CA +R (t) T J-TA = I 2 (t) x RDS(ON ) D TJ Typical RJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 250oC/W when mounted on a 0.02 in2 pad of 2oz copper. b. 270oC/W when mounted on a 0.001 in2 pad of 2oz copper. 1a 1b Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%. NDS331N Rev.E Typical Electrical Characteristics 4 I D , DRAIN-SOURCE CURRENT (A) 1.75 3.0 3 2.7 2.0 R DS(on) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS =4.5V 2.5 1.5 VGS = 2.0V 1.25 2 2.5 1 1.5 1 2.7 3.0 3.5 4.5 0.75 0 0.5 0 V DS 1 2 , DRAIN-SOURCE VOLTAGE (V) 3 0 0.5 I 1 D 1.5 2 , DRAIN CURRENT (A) 2.5 3 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 DRAIN-SOURCE ON-RESISTANCE DRAIN-SOURCE ON-RESISTANCE 1.6 1.4 1.2 1 0.8 0.6 -50 1.75 R DS(ON), NORMALIZED RDS(on) , NORMALIZED I D = 1.3A VGS = 2.7V VGS = 2.7 V 1.5 TJ = 125C 1.25 25C 1 0.75 -55C 0.5 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150 0 0.5 1 1.5 2 I , DRAIN CURRENT (A) D 2.5 3 Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Drain Current and Temperature. 4 1.3 GATE-SOURCE THRESHOLD VOLTAGE V DS = 5.0V I D, DRAIN CURRENT (A) 3 T = -55C J 25C 125C V th, NORMALIZED 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -50 V DS = V GS I D = 250A 2 1 0 0 0.5 V GS 1 1.5 2 , GATE TO SOURCE VOLTAGE (V) 2.5 3 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150 Figure 5. Transfer Characteristics. Figure 6. Gate Threshold Variation with Temperature. NDS331N Rev.E Typical Electrical Characteristics (continued) BV DSS , NORMALIZED DRAIN-SOURCE BREAKDOWN VOLTAGE 1.12 1 I D = 250A 1.08 I , REVERSE DRAIN CURRENT (A) V GS = 0V 0.1 T = 125C J 0.01 1.04 25C -55C 1 0.96 0.001 S 0.92 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150 0.0001 0 0.2 0.4 0.6 0.8 1 V , BODY DIODE FORWARD VOLTAGE (V) SD 1.2 Figure 7. Breakdown Voltage Variation with Temperature. Figure 8. Body Diode Forward Voltage Variation with Source Current and Temperature. 600 V GS , GATE-SOURCE VOLTAGE (V) 400 200 100 50 5 ID = 1.3A 4 V DS = 5V 15V 10V CAPACITANCE (pF) C iss C oss 3 2 C rss 20 10 0.1 f = 1 MHz V GS = 0V 0.2 V DS 1 0 0.5 1 2 5 , DRAIN TO SOURCE VOLTAGE (V) 10 20 0 1 2 3 Q g , GATE CHARGE (nC) 4 5 Figure 9. Capacitance Characteristics. Figure 10. Gate Charge Characteristics. VDD V IN D t on t off tr 90% RL V OUT t d(on) t d(off) 90% tf VGS R GEN VOUT G DUT 10% 10% INVERTED 90% S V IN 10% 50% 50% PULSE WIDTH Figure 11. Switching Test Circuit. Figure 12. Switching Waveforms. NDS331N Rev.E Typical Electrical Characteristics (continued) , TRANSCONDUCTANCE (SIEMENS) 8 20 VDS = 5.0V I , DRAIN CURRENT (A) 6 10 T J = -55C 25C 3 1 N) S(O RD IT LIM 10 10 0m 10 0u s ms s 4 125C 1s 0.3 0.1 0.03 10s 2 g FS VGS = 2.7V SINGLE PULSE RJA =See Note1b TA = 25C 0.2 DC 0 D 0 1 2 ID , DRAIN CURRENT (A) 3 4 0.01 0.1 0.5 1 2 5 10 V DS , DRAIN-SOURCE VOLTAGE (V) 20 30 Figure 13. Transconductance Variation with Drain Current and Temperature. Figure 14. Maximum Safe Operating Area. STEADY-STATE POWER DISSIPATION (W) 0.8 I D , STEADY-STATE DRAIN CURRENT (A) 1 1.8 1.6 0.6 1b 1a 1.4 1a 0.4 1.2 1b 0.2 4.5"x5" FR-4 Board TA = 25 oC Still Air 4.5"x5" FR-4 Board TA = 25 oC Still Air VGS = 2.7V 0 1 0 0.1 0.2 0.3 2oz COPPER MOUNTING PAD AREA (in 2 ) 0.4 0 0.1 0.2 0.3 2 2oz COPPER MOUNTING PAD AREA (in ) 0.4 Figue 15. SuperSOTTM _ 3 Maximum Steady-State Power Dissipation. versus Copper Mounting Pad Area. Figure 16. Maximum Steady-State Drain Current versus Copper Mounting Pad. Area 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001 D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse R JA (t) = r(t) * R JA R JA = See Note 1b P(pk) t1 t2 TJ - TA = P * R JA (t) Duty Cycle, D = t1 /t2 0.001 0.01 0.1 t 1 , TIME (sec) 1 10 100 300 Figure 17. Transient Thermal Response Curve. Note : Thermal characterization performed using the conditions described in note 1b. response will change depending on the circuit board design. Transient thermal NDS331N Rev.E |
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